signal_output("TgtData", "32", "medium", "Data for transaction word (to all n targets)"); signal_end(); signal_list("Ports on complex registered postbus router"); signal_input("n SrcType", "2*n", "late", "Type of transaction word (one per source)"); signal_input("n SrcData", "32*n", "late", "Data for transaction word (one per source)"); signal_input("m TgtAck", "m", "late", "Can take presented data"); signal_output("SrcAck", "n", "early", "Is taking presented data; combinatorial (one per source)"); signal_output("TgtType", "2*m", "early", "Type of transaction word"); signal_output("TgtData", "32*m", "early", "Data for transaction word"); signal_end(); ?> <?php page_section("simple_implementation", "Simple implementation"); ?> A simple implementation of a postbus router takes a small number of sources, say 4, and distributes data to a small number of targets, say 8. The simple implementation has a state machine, and it multiplexes its incoming 4 sets of source data together to present to all 8 targets. <p> <?php code_format("cdl", "cdl/simple.cdl"); ?> <?php page_ep(); include "{$toplevel}web_assist/web_footer.php";
handled. <?php code_format("gip", "code/system_mode_no_interrupt_pending.s"); ?> <?php page_section("system_mode_interrupts", "System mode with interrupts pending"); ?> This is the code that occurs when the microkernel was idling, and when either a hardware or software interrupt occurs. It examines the source of the interrupt, clearing the indication atomically. It then despatches to the correct routines until all the interrupt sources are handled. <?php code_format("gip", "code/system_mode_interrupt_pending.s"); ?> <?php page_section("swi_entry", "SWI entry code"); ?> <?php code_format("gip", "code/swi_entry.s"); ?> <?php page_ep(); include "{$toplevel}web_assist/web_footer.php";